Design Of 3-Valued R-S & D Flip - Flops Based on Simple Ternary Gates
نویسندگان
چکیده
described. A new clock is developed according to which circuit makes transition as well as retains present, past & former past information. The proposed flip-flops are constructed using clocked T-Gates that reduces the number of transistors required to implement single clocked gates. In the verification by simulation, the proposed flip-flops appear to have lesser power consumption, better speed of operation.
منابع مشابه
A Proposal for the Implementation of Ternary Digital Circuits - Microelectronics, 1995. Proceedings., 1995 20th International Conference on
A nonclassical multi-valued logic based on Post algebra is presented. Besides the conventional Post's cyclic negation, this nonclassical logic algebra defines new operators that simplify the truth-table minimization techniques. An electronic implementation of this algebra for a 3-level logic is proposed. Electronics gates of Post negation and the new operators were designed and simulated using ...
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تاریخ انتشار 2005